A 14-Bit Cascaded 2-2-1 Sigma-Delta Modulator for Wideband Communication


A low-distortion 2-2-1 cascaded sigma-delta modulator for wide-band applications is presented. The topology includes three stages: the first and second stage is formed by second order low-distortion multi-bit architecture, while the following stage is realized by first order structure. This kind of architecture can greatly reduce the non-linear effects by using low-distortion architecture, and suppress the in-band noise, so it can reduce the over sampling ratio(OSR) effectively. The 2-2-1 cascaded sigma-delta modulator employing 4-b quantizers in very stage makes all quantization noise sources negligible at oversampling ratio(OSR) of 8. Behavioral simulation takes into account most of the non-idealities and experimental results show that for a 12.5 MHz signal bandwidth and 200MHz oversampling frequency, the modulator achieves a peak SNDR of 88.1 dB and an effective resolution of 14.34 bits with OSR of 8. The simulation also shows that it has well over loaded condition and power saving characters. This kind of topology reveals a good efficiency in the wide-band applications.

  • Abstract
  • Key Words
  • 1. Introduction
  • 2. Design of Low Distortion Cascaded 2-2-1 4-Bit Sigma-Delta Modulator
  • 3. Non-Edealities for 2-2-1 Cascaded Multi-Bit Sigma-Delta Modulat
  • 4. Experimental Results
  • 5. Conclusion
  • Acknowledgement
  • References

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